Physically, electronic semiconductors are fabricated by etching geometric patterns into wafers of silicon or other semi-conductive material. The geometric patterns are typically used to define regions on the wafer that will be chemically doped in order to create transistors and various other devices. By providing conductive paths on the wafer, devices such as transistors can be electrically connected to other transistors or devices in order to form very complex circuits. The resulting circuits are known as “integrated circuits”.
Integrated circuits are much like any other electronic system. A collection of functional circuits may be combined to accomplish a particular function. In many ways, an integrated circuit can be compared to a printed circuit board that is populated with transistors and other components. Where the printed circuit board uses traces etched from a copper sheet adhered to its surface to connect components together, the integrated circuit uses the conductive paths to connect one component to the next.
When a printed circuit board is assembled, it generally needs to be tested to make sure it is functioning properly. Modernly, testing of circuit boards requires attachment of the circuit board to a test system. The test system normally uses a multiplicity of physical connections to monitor the state of “test points” on the circuit board. These test points are normally defined when the circuit board is first designed. They are usually selected because the activity that is exhibited at the test point is indicative of the overall health of the completed circuit board being tested. Literally, the number of test points that must be monitored to test a complicated circuit board may reach into the hundreds, but many circuit boards may be tested with less than a hundred test points. In most instances, all of the test points must be monitored simultaneously. This means that a separate physical connection must be provided from each test point to the test system.
Testing an integrated circuit is just as, or perhaps even more complicated than testing an assembled circuit board. First, the integrated circuit is usually tested at several stages of the manufacturing process. When the integrated circuit is manufactured, it is generally fabricated on a wafer. The wafer may actually contain hundreds of instances of the same integrated circuit pattern. After the wafer is fabricated, it is physically sawed apart to separate the individual integrated circuits into die. Each resulting die is a fungible product that may eventually be shipped to a customer as an integrated circuit.
Before an individual die can be shipped, it is usually encapsulated into a plastic molded package. Pins of a plastic package are connected with micro-fine wires to connection points on the integrated circuit that are known as bonding pads. The bonding pads are normally much larger than other features on an integrated circuit because each bonding pad must be large enough to accommodate a connection wire. The pins protrude through the encapsulant so that the integrated circuit can be connected to a circuit board like any other electronic component.
The task of packaging an integrated circuit is very time consuming and expensive. This means that individual die must be tested before they are packaged to ensure that defective components are not packaged. Once the device is actually packaged, it must be tested again to verify that the packaging was properly done. This is usually performed to make sure that all of the physical connections from the bonding pads on the integrated circuit are all connected to the pins that are used to connect the integrated circuit to a printed circuit board.
Testing an integrated circuit is difficult, due mainly to its miniature features. In order to properly test an integrated circuit, additional bonding pads may need to be provided on the silicon die. Because bonding pads are so much larger than other circuit elements, they waste space that could otherwise be used for functional circuitry. As a result, the number of components that can be produced from a single wafer, or yield, may be reduced. For this reason, many integrated circuit designs limit the number of additional test points that are provided for functional testing.
Testing an unpackaged integrated circuit is also physically dangerous to the device under test. In order to make contact with the bonding pads on an integrated circuit, a physical connection is normally made by means of an apparatus known as a “flying probe”. The flying probe is a robotic electrical probe that can be directed numerically to a bonding pad. The contact pressure that the flying probe exerts on the bonding pad may also damage the integrated circuit.
Once the integrated circuit is packaged, it may still be damaged during the testing process. Semiconductors are very susceptible to damage at a molecular level by electrical static discharge (ESD). Whenever two different materials come in contact with each other, there is a voltage difference between them. If the voltage difference is large enough, a sudden current flow may be induced as the voltage between the two materials equalizes. During testing, the integrated circuit may be damaged if it comes into contact with another object. If the voltage difference between the integrated circuit and the other object, such as a test probe or human being, is large enough, the static discharge may damage the device. This kind of ESD damage can also occur when the integrated circuit is tested before it is packaged.
Recognizing the problem of handling integrated circuits during testing, White et al. (U.S. Pat. No. 6,331,782) teaches that a test point on an integrated circuit can be monitored wirelessly. According to White, the electrical state of a test point can be used to modulate a carrier or effect some other wireless communications such as electromagnetic coupling or optical signals. A test apparatus can demodulate the carrier or receive a different wireless conveyance in order to monitor the status of the test point.
Although White addresses the issues of physical damage that can be associated with contact-oriented probing of an integrated circuit, his method does not address the real problem with testing an integrated circuit, or for that matter, even a complicated printed circuit board assembly. In order to be effective, any contact-oriented testing method must be capable of simultaneously monitoring a plurality of test points. Whether the testing involves an integrated circuit, a printed circuit board or some higher-level electronic assembly, a test apparatus must have simultaneous access to the test points in order to properly validate circuit operation.
The flying probe can only make a very limited number of simultaneous connections. Anyway, the physical area of each bonding pad may limit the number of test points; the number of contact limitations of the flying probe may be moot in this instance. White's wireless technique is limited to only one test point. In fact, White admits that if additional test points need to be monitored, additional carriers at other frequencies must be used. In one alternative, White suggests that a spread spectrum transmitter could be used to convey the state of a plurality of test points on an integrated circuit; each test point could be distinguished by a different spread-spectrum frequency hopping sequence. Either of these methods would require significant and very complex circuitry on the integrated circuit. This additional circuitry could have a counterproductive effect on production yield much like that associated with the use of an excessive number of bonding pads for individual test points.